AD7851KRZ Analog Devices Inc, AD7851KRZ Datasheet

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FEATURES Single 5 V Supply 333 kSPS Throughput Rate/ 2 LSB DNL—A Grade 285 kSPS Throughput Rate/ 1 LSB DNL—K Grade A and K Grades Guaranteed to 125 C/238 kSPS Throughput Rate Pseudo-Differential Input with Two Input Ranges System ...

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AD7851 TABLE OF CONTENTS FEATURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

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SPECIFICATIONS A Grade MHz (– +85 C), f CLKIN SAMPLE (to 125 C 238 kHz; ( 5.0 V SAMPLE DD DD unless otherwise noted.) Parameter DYNAMIC PERFORMANCE 3 ...

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AD7851 Parameter POWER PERFORMANCE Normal Mode 5 Sleep Mode With External Clock On With External Clock Off Normal Mode Power Dissipation Sleep Mode Power Dissipation With External Clock On With External Clock Off ...

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TIMING SPECIFICATIONS Descriptions that refer to SCLK↑ (rising) or SCLK↓ (falling) edges are with the POLARITY pin HIGH. For the POLARITY pin LOW, then the opposite edge of SCLK will apply. Limit MIN MAX Parameter ...

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AD7851 TYPICAL TIMING DIAGRAMS Figures 2 and 3 show typical read and write timing diagrams. Figure 2 shows the reading and writing after conversion in Interface Modes 2 and 3. To attain the maximum sample rate of 285 kHz in ...

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... AD7851ARZ-REEL –40°C to +85°C AD7851KR 0°C to 85°C AD7851KR-REEL 0°C to 85°C 3 AD7851KRZ 0°C to 85°C 3 AD7851KRZ-REEL 0°C to 85°C AD7851ARS –40°C to +85°C AD7851ARS-REEL –40°C to +85°C 4 EVAL-AD7851CB 5 EVAL-CONTROL BRD2 NOTES 1 Both A and K Grades are guaranteed up to 125°C, but at a lower throughput of 238 kHz (5 MHz). ...

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AD7851 TERMINOLOGY Integral Nonlinearity This is the maximum deviation from a straight line passing through the endpoints of the ADC transfer function. The end- points of the transfer function are zero scale, a point 1/2 LSB below the first code ...

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Pin No. Mnemonic Description CONVST 1 Convert Start. Logic input. A low-to-high transition on this input puts the track-and-hold into its hold mode and starts conversion. When this input is not used, it should be tied to DV Busy Output. ...

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AD7851 AD7851 ON-CHIP REGISTERS The AD7851 powers up with a set of default conditions, and the user need not ever write to the device. In this case, the AD7851 will operate as a read-only ADC. The AD7851 still retains the ...

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CONTROL REGISTER The arrangement of the control register is shown below. The control register is a write-only register and contains 14 bits of data. The control register is selected by putting two 1s in ADDR1 and ADDR0. The function of ...

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AD7851 STATUS REGISTER The arrangement of the status register is shown below. The status register is a read-only register and contains 16 bits of data. The status register is selected by first writing to the control register and putting two ...

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CALIBRATION REGISTERS The AD7851 has 10 calibration registers in all, 8 for the DAC, 1 for the offset, and 1 for gain. Data can be written to or read from all 10 calibration registers. In self- and system calibration, the ...

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AD7851 START WRITE TO CONTROL REGISTER SETTING STCAL = 0, RDSLT1 = 1, RDSLT0 = 0, AND CALSLT1, CALSLT0 = 00, 01, 10, 11 CAL REGISTER POINTER IS AUTOMATICALLY RESET READ CAL REGISTER CAL REGISTER POINTER IS AUTOMATICALLY INCREMENTED LAST ...

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CIRCUIT INFORMATION The AD7851 is a fast, 14-bit single-supply ADC. The part requires an external 6/7 MHz master clock (CLKIN), two capacitors, a CONVST signal to start conversion, and C REF power supply decoupling capacitors. The part provides the user ...

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AD7851 ANALOG INPUT The equivalent circuit of the analog input section is shown in Figure 11. During the acquisition interval, the switches are both in the track position and the AIN(+) charges the 20 pF capacitor through the 125 Ω ...

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Input Ranges The analog input range for the AD7851 the unipolar and bipolar ranges. The only difference between the unipolar range and the bipolar range is that in the bipolar range the AIN(–) has to ...

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AD7851 REFERENCE SECTION For specified performance recommended that when using an external reference this reference should be between 4 V and the analog supply AV . The connections for the relevant refer- DD ence pins are shown in ...

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5. –74 100mV pk-pk SINEWAVE REF = 4.098 EXT REFERENCE –76 IN –78 –80 –82 –84 –86 –88 –90 0.91 13.4 25.7 38.3 50.3 63.5 INPUT FREQUENCY (kHz) Figure 22. ...

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AD7851 POWER-UP TIMES Using an External Reference When the AD7851 is powered up, the part is powered up from one of two conditions: first, when the power supplies are initially powered up and; secondly, when the parts are powered up ...

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Table VII. Power Consumption vs. Throughput Throughput Rate Power AD7851 1 kSPS kSPS 18 mW 100 10 1 0.1 0.01 0 200 400 600 800 1000 1200 1400 1600 1800 THROUGHPUT RATE (Hz) Figure 26. Power vs. ...

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AD7851 Self-Calibration Timing Figure 27 shows the timing for a full self-calibration. Here the BUSY line stays high for the full length of the self-calibration. A self-calibration is initiated by bringing the CAL pin low (which initiates an internal reset) ...

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System Gain and Offset Interaction The inherent architecture of the AD7851 leads to an interaction between the system offset and gain errors when a system calibra- tion is performed. Therefore recommended to perform the cycle of a system ...

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AD7851 SERIAL INTERFACE SUMMARY Table IX details the five interface modes and the serial clock edges from which the data is clocked out by the AD7851 (DOUT edge) and that the data is latched in on (DIN edge). The logic ...

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DETAILED TIMING SECTION Mode 1 (2-Wire 8051 Interface) The read and writing takes place on the DIN line and the conver- sion is initiated by pulsing the CONVST pin (note that in every write cycle the 2/3 MODE bit must ...

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AD7851 Mode 2 (3-Wire SPI/QSPI Interface Mode) Default Interface Mode Figure 35 shows the timing diagram for Interface Mode 2 which is the SPI/QSPI interface mode. Here the SYNC input is active low and may be pulsed or tied permanently ...

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MODE 4 and 5 (Self-Clocking Modes) The timing diagrams in Figure 38 and Figure 39 are for Inter- face Modes 4 and 5. Interface Mode 4 has a noncontinuous SCLK output and Interface Mode 5 has a continuous SCLK output ...

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AD7851 If the user has control of the CONVST pin but does not want to exercise it for every conversion, the control register may be used to start a conversion. Setting the CONVST bit in the control register to 1 ...

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Writing to the AD7851 For accessing the on-chip registers necessary to write to the part. To enable Serial Interface Mode 1, the user must also write to the part. Figures 41, 42, and 43 shows how to configure ...

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AD7851 Interface Mode 1 Configuration Figure 42 shows the flowchart for configuring the part in Inter- face Mode 1. This mode of operation can only be enabled by writing to the control register and setting the 2/3 MODE bit. Reading ...

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MICROPROCESSOR INTERFACING In many applications, the user may not require the facility of writing to the on-chip registers. The user may just want to hardwire the relevant pins to the appropriate levels and read the conversion result. In this case, ...

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AD7851 AD7851 to ADSP-21xx Interface Figure 47 shows the AD7851 interface to the ADSP-21xx. The ADSP-21xx is the slave and the AD7851 is the master. The AD7851 is in Interface Mode 5. For the ADSP-21xx, the bits in the serial ...

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APPLICATION HINTS Grounding and Layout The analog and digital supplies to the AD7851 are independent and separately pinned out to minimize coupling between the analog and digital sections of the device. The part has very good immunity to noise on ...

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AD7851 0.180 (4.57) MAX 0.150 (3.81) 0.130 (3.30) 0.110 (2.79) 0.30 (0.0118) 0.10 (0.0039) COPLANARITY 0.10 CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN ...

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MIN REV. B 24-Lead Shrink Small Outline Package [SSOP] (RS-24) Dimensions shown in millimeters 8.50 8.20 7. 8.20 5.60 7.80 5.30 7.40 5. 1.85 1.75 0.10 2.00 MAX 1.65 COPLANARITY 0.25 0.65 0.38 BSC 0.09 ...

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AD7851 Revision History Location 3/04—Data Sheet changed from REV REV. B. Moved Page Index from Page 33 to Page ...