DS21455 Maxim Integrated Products, DS21455 Datasheet - Page 145
DS21455
Manufacturer Part Number
DS21455
Description
Network Controller & Processor ICs Quad E1-T1-J1 Single -Chip Transceiver (S
Manufacturer
Maxim Integrated Products
Specifications of DS21455
Product
Framer
Number Of Transceivers
4
Data Rate
64 Kbps
Supply Voltage (max)
3.465 V
Supply Voltage (min)
3.135 V
Supply Current (max)
328 mA
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Package / Case
BGA
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DS21455
Manufacturer:
MAXIM/美信
Quantity:
20 000
Company:
Part Number:
DS21455+
Manufacturer:
Maxim Integrated Products
Quantity:
135
Company:
Part Number:
DS21455N+
Manufacturer:
Maxim Integrated Products
Quantity:
135
24.2.1 FIFO Control
Control of the transmit and receive FIFOs is accomplished via the FIFO control (HxFC). The FIFO
control register sets the watermarks for both the transmit and receive FIFO. Bits 3–5 set the transmit low
watermark and the lower 3 bits set the receive high watermark.
When the transmit FIFO empties below the low watermark, the TLWM bit in the appropriate HDLC
status register SR6 or SR7 will be set. TLWM is a real-time bit and will remain set as long as the transmit
FIFO’s read pointer is below the watermark. If enabled, this condition can also cause an interrupt via the
INT pin.
When the receive FIFO fills above the high watermark, the RHWM bit in the appropriate HDLC status
register will be set. RHWM is a real-time bit and will remain set as long as the receive FIFO’s write
pointer is above the watermark. If enabled, this condition can also cause an interrupt via the INT pin.
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bits 0 to 2/Receive FIFO High Watermark Select (RFHWM0 to RFHWM2).
Bits 3 to 5/Transmit FIFO Low Watermark Select (TFLWM0 to TFLWM2).
Bit 6/Unused, must be set to zero for proper operation.
Bit 7/Unused, must be set to zero for proper operation.
RFHWM2
TFLWM2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
RFHWM1
TFLWM1
—
7
0
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
—
H1FC, H2FC
HDLC # 1 FIFO Control, HDLC # 2 FIFO Control
91h, A1h
6
0
RFHWM0
TFLWM0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
TFLWM2
5
0
TFLWM1
TRANSMIT FIFO WATERMARK (BYTES)
RECEIVE FIFO WATERMARK (BYTES)
4
0
145 of 270
TFLWM0
3
0
112
112
16
32
48
64
80
96
16
32
48
64
80
96
4
4
RFHWM2
2
0
RFHWM1
1
0
RFHWM0
0
0