FDC6506P Fairchild Semiconductor, FDC6506P Datasheet - Page 2

• Manufacturer Part Number: FDC6506P
• Description: MOSFET P-CHAN DUAL 30V SSOT6
• Manufacturer: Fairchild Semiconductor
• Series: PowerTrench®r
• Type: Power MOSFETr

Specifications of FDC6506P

• Fet Type: 2 P-Channel (Dual)
• Fet Feature: Logic Level Gate
• Rds On (max) @ Id, Vgs: 170 mOhm @ 1.8A, 10V
• Drain To Source Voltage (vdss): 30V
• Current - Continuous Drain (id) @ 25° C: 1.8A
• Vgs(th) (max) @ Id: 3V @ 250µA
• Gate Charge (qg) @ Vgs: 3.5nC @ 10V
• Input Capacitance (ciss) @ Vds: 190pF @ 15V
• Power - Max: 700mW
• Mounting Type: Surface Mount
• Package / Case: 6-SSOT, SuperSOT-6
• Configuration: Dual
• Transistor Polarity: P-Channel
• Resistance Drain-source Rds (on): 0.17 Ohm @ 10 V
• Forward Transconductance Gfs (max / Min): 3 S
• Drain-source Breakdown Voltage: 30 V
• Gate-source Breakdown Voltage: +/- 20 V
• Continuous Drain Current: 1.8 A
• Power Dissipation: 960 mW
• Maximum Operating Temperature: + 150 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 55 C
• Number Of Elements: 2
• Polarity: P
• Channel Mode: Enhancement
• Drain-source On-res: 0.17Ohm
• Drain-source On-volt: 30V
• Gate-source Voltage (max): ±20V
• Output Power (max): Not RequiredW
• Frequency (max): Not RequiredMHz
• Noise Figure: Not RequireddB
• Power Gain: Not RequireddB
• Drain Efficiency: Not Required%
• Operating Temp Range: -55C to 150C
• Operating Temperature Classification: Military
• Mounting: Surface Mount
• Pin Count: 6
• Package Type: SuperSOT
• Module Configuration: Dual
• Continuous Drain Current Id: 1.8A
• Drain Source Voltage Vds: -30V
• On Resistance Rds(on): 170mohm
• Rds(on) Test Voltage Vgs: -10V
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: FDC6506PTR

Electrical Characteristics
Off Characteristics
BV
I
I
I
On Characteristics
V
R
I
g
Dynamic Characteristics
C
C
C
Switching Characteristics
t
t
t
t
Q
Q
Q
Drain-Source Diode Characteristics and Maximum Ratings
I
V
Notes:
1. R
Symbol
DSS
GSSF
GSSR
D(on)
d(on)
r
d(off)
f
S
2. Pulse Test: Pulse Width
FS
BV
V
GS(th)
SD
DS(on)
iss
oss
rss
g
gs
gd
GS(th)
DSS
T
T
of the drain pins. R
sharing the dissipated heat energy equally.
Scale 1 : 1 on letter size paper
DSS
J
J
JA
is the sum of the junction-to-case and case-to-ambient resistance where the case thermal reference is defined as the solder mounting surface
Drain-Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate-Body Leakage Current, Forward
Gate-Body Leakage Current, Reverse
Gate Threshold Voltage
Gate Threshold Voltage
Temperature Coefficient
Static Drain-Source
On-Resistance
On-State Drain Current
Forward Transconductance
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Turn-On Delay Time
Turn-On Rise Time
Turn-Off Delay Time
Turn-Off Fall Time
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Maximum Continuous Drain-Source Diode Forward Current
Drain-Source Diode Forward Voltage
JC
a) 130 C/W when
mounted on a 0.125 in
pad of 2 oz. copper.
is guaranteed by design while R
300 s, Duty Cycle
Parameter
(Note 2)
(Note 2)
2
2.0%
T
JA
A
= 25°C unless otherwise noted
is determined by the user's board design.Both devices are assumed to be operating and
V
I
V
V
V
V
I
V
V
V
V
V
V
f = 1.0 MHz
V
V
V
V
V
D
D
GS
DS
GS
GS
DS
GS
GS
GS
GS
DS
DS
DD
GS
DS
GS
GS
= -250 A, Referenced to 25 C
= -250 A, Referenced to 25 C
= -24 V, V
= V
= -5 V, I
= -15 V, V
= -15 V, I
= -5 V, I
= 0 V, I
= 20 V, V
= -20 V, V
= -10 V, I
= -10 V, I
= -4.5 V, I
= -10 V, V
= -4.5 V, R
= -10 V
= 0 V, I
b) 140 C/W when
Test Conditions
mounted on a 0.005 in
pad of 2 oz. copper.
GS
, I
D
S
D
D
D
= -250 A
= -0.8 A
= -250 A
D
D
D
DS
= -1.8 A
= -1.8 A,
D
GS
DS
DS
GS
= -1.8 A
= -1.8 A @125 C
= -1 A,
GEN
= -1.4 A
= 0 V
= 0 V
= 0 V
= - 5 V
= 0 V,
= 6
(Note 2)
2
Min Typ Max Units
-30
-10
-1
0.14
0.20
0.22
-1.8
190
-0.8
-20
2.3
0.8
70
30
14
c) 180 C/W when
4
3
7
8
2
1
mounted on a 0.0015 in
pad of 2 oz. copper.
-100
0.17
0.27
0.28
-0.8
-1.2
100
3.5
16
14
25
-1
-3
6
FDC6506P Rev. C
mV/ C
mV/ C
nA
nA
nC
nC
nC
pF
pF
pF
ns
ns
ns
ns
V
V
A
S
A
V
A
2