CDB4340 Cirrus Logic Inc, CDB4340 Datasheet - Page 4

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CDB4340

Manufacturer Part Number
CDB4340
Description
Audio Modules & Development Tools Eval Bd 101dB 96kHz DAC
Manufacturer
Cirrus Logic Inc
Datasheet

Specifications of CDB4340

Description/function
Audio D/A
Operating Supply Voltage
5 V
Product
Audio Modules
For Use With/related Products
CS4340
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
5. ANALOG OUTPUT FILTER
The evaluation board includes a pair of single pole
passive filters. The passive filters, Fig. 3, have a
corner frequency of approximately 95 kHz with
JP3 and JP6 installed and 190 kHz without JP3 and
JP6.
6. INPUT/OUTPUT FOR CLOCKS AND
The evaluation board has been designed to allow
the interface to external systems via the 10-pin
header, J9. This header allows the evaluation board
to accept externally generated clocks and data. The
schematic for the clock/data I/O is shown in
Figure 11. The 74HC243 transceiver functions as
an I/O buffer where jumpers HDR1-HDR6 deter-
mine if the transceiver operates as a transmitter or
receiver. A transmit function is implemented with
the HDR1-HDR6 jumpers in the 8414 position.
LRCK, SDATA, and SCLK from the CS8414 will
be outputs on J9. The transceiver operates as a re-
ceiver with jumpers HDR1-HDR6 in the EXTER-
NAL position. MCLK, LRCK, SDATA and SCLK
on J9 become inputs.
7. POWER SUPPLY CIRCUITRY
Power is supplied to the evaluation board by three
binding posts (GND, +5V, +3V/+5V) (see
Figure 10). The +5V input supplies power to the
+5 Volt digital circuitry (VA+5, VD+5, VDPC+5),
while the +3V/+5V input supplies power to the
Voltage Level Converter and the CS4340/41 for
evaluation in either +3 or +5 Volt mode. Note, the
4
DATA
supply voltages, VCCA and VCCB, to the Voltage
Level Converter (LVXC4245) must remain within
2.25 Volts of each other in order to maintain proper
operation.
8. GROUNDING AND POWER SUPPLY
The CS4340/41 requires careful attention to power
supply and grounding arrangements to optimize
performance. Figure 10 details the power distribu-
tion used on this board. The CDB4340/41 ground
plane is split to control the digital return currents in
order to minimize digital interference. The decou-
pling capacitors are located as close to the
CS4340/41 as possible. Extensive use of ground
plane fill on both the analog and digital sections of
the evaluation board yields large reductions in radi-
ated noise.
9. CDB4341 CONTROL PORT
The CDB4341 is shipped with Windows based
software for interfacing with the CS4341 control
port via the DB25 connector, P1. The software can
be used to communicate with the CS4341 in either
SPI or I
CS4341 registers are write-only.
Run SETUP.EXE from the distribution diskette to
install the software. Further documentation for the
software is available on the distribution diskette.
The documentation is available in the plain text for-
mat file, README.TXT.
DECOUPLING
SOFTWARE
2
C mode; however, in SPI mode the
CDB4340/41
DS297DB3

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