DSPIC30F6010-20E/PF Microchip Technology, DSPIC30F6010-20E/PF Datasheet - Page 213

no-image

DSPIC30F6010-20E/PF

Manufacturer Part Number
DSPIC30F6010-20E/PF
Description
IC,DSP,16-BIT,CMOS,TQFP,80PIN,PLASTIC
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr

Specifications of DSPIC30F6010-20E/PF

Rohs Compliant
YES
Core Processor
dsPIC
Core Size
16-Bit
Speed
20 MIPS
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
68
Program Memory Size
144KB (48K x 24)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
80-TQFP, 80-VQFP
Package
80TQFP
Device Core
dsPIC
Family Name
dsPIC30
Maximum Speed
20 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
16 Bit
Interface Type
CAN/I2C/SPI/UART
On-chip Adc
16-chx10-bit
Number Of Timers
5
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DM300019 - BOARD DEMO DSPICDEM 80L STARTERAC164314 - MODULE SKT FOR PM3 80PFDM300020 - BOARD DEV DSPICDEM MC1 MOTORCTRLAC30F001 - MODULE SOCKET DSPIC30F 80TQFPXLT80PT2 - SOCKET TRANSITION ICE 80TQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
DSPIC30F601020EPF

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DSPIC30F6010-20E/PF
Manufacturer:
Microchip Technology
Quantity:
10 000
INDEX
A
A/D
AC Characteristics ............................................................ 176
AC Temperature and Voltage Specifications .................... 176
Address Generator Units .................................................... 31
Alternate 16-bit Timer/Counter............................................ 81
Alternate Vector Table ........................................................ 41
Assembler
Automatic Clock Stretch.................................................... 102
B
Bandgap Start-up Time
Barrel Shifter ....................................................................... 18
Bit-Reversed Addressing .................................................... 34
Block Diagrams
BOR Characteristics ......................................................... 175
BOR. See Brown-out Reset
Brown-out Reset
Brown-out Reset (BOR) .................................................... 139
© 2006 Microchip Technology Inc.
1 Msps Configuration Guideline................................ 132
600 ksps Configuration Guideline ............................. 133
750 ksps Configuration Guideline ............................. 133
Conversion Rate Parameters.................................... 131
Conversion Speeds................................................... 131
Selecting the Conversion Clock ................................ 130
Voltage Reference Schematic .................................. 132
Load Conditions ........................................................ 176
MPASM Assembler................................................... 154
During 10-bit Addressing (STREN = 1)..................... 102
During 7-bit Addressing (STREN = 1)....................... 102
Receive Mode ........................................................... 102
Transmit Mode .......................................................... 102
Requirements............................................................ 182
Timing Characteristics .............................................. 182
Example ...................................................................... 34
Implementation ........................................................... 34
Modifier Values (table) ................................................ 35
Sequence Table (16-Entry)......................................... 35
10-bit High Speed A/D Functional............................. 128
16-bit Timer1 Module .................................................. 58
16-bit Timer4............................................................... 68
16-bit Timer5............................................................... 68
32-bit Timer4/5............................................................ 67
CAN Buffers and Protocol Engine............................. 116
Dedicated Port Structure............................................. 53
DSP Engine ................................................................ 15
dsPIC30F6010 .............................................................. 6
External Power-on Reset Circuit............................... 147
I
Input Capture Mode .................................................... 71
Oscillator System ...................................................... 141
Output Compare Mode ............................................... 75
PWM Module .............................................................. 86
Quadrature Encoder Interface .................................... 79
Reset System............................................................ 145
Shared Port Structure ................................................. 54
SPI .............................................................................. 96
SPI Master/Slave Connection ..................................... 96
UART Receiver ......................................................... 108
UART Transmitter ..................................................... 107
Characteristics .......................................................... 174
Timing Requirements................................................ 182
2
C............................................................................. 100
C
C Compilers
CAN Module ..................................................................... 115
Center Aligned PWM .......................................................... 89
CLKOUT and I/O Timing
Code Examples
Code Protection ................................................................ 139
Complementary PWM Operation........................................ 90
Configuring Analog Port Pins.............................................. 54
Control Registers ................................................................ 44
Core Overview .................................................................... 11
Core Register Map.............................................................. 27
CPU Architecture Overview ................................................ 11
Customer Change Notification Service............................. 216
Customer Notification Service .......................................... 216
Customer Support............................................................. 216
D
Data Access from Program Memory Using
Data Accumulators and Adder/Subtractor .......................... 16
Data Address Space........................................................... 23
MPLAB C18.............................................................. 154
MPLAB C30.............................................................. 154
CAN1 Register Map.................................................. 122
CAN2 Register Map.................................................. 124
I/O Timing Characteristics ........................................ 200
Overview................................................................... 115
Characteristics.......................................................... 180
Requirements ........................................................... 180
Data EEPROM Block Erase ....................................... 50
Data EEPROM Block Write ........................................ 52
Data EEPROM Read.................................................. 49
Data EEPROM Word Erase ....................................... 50
Data EEPROM Word Write ........................................ 51
Erasing a Row of Program Memory ........................... 45
Initiating a Programming Sequence ........................... 46
Loading Write Latches ................................................ 46
NVMADR .................................................................... 44
NVMADRU ................................................................. 44
NVMCON.................................................................... 44
NVMKEY .................................................................... 44
Program Space Visibility............................................. 22
Data Space Write Saturation ...................................... 18
Overflow and Saturation ............................................. 16
Round Logic ............................................................... 17
Write Back .................................................................. 17
Alignment.................................................................... 26
Alignment (Figure) ...................................................... 26
Effect of Invalid Memory Accesses............................. 26
MCU and DSP (MAC Class) Instructions Example .... 25
Memory Map......................................................... 23, 24
Near Data Space ........................................................ 27
Software Stack ........................................................... 27
Spaces........................................................................ 26
Width .......................................................................... 26
dsPIC30F6010
DS70119E-page 211

Related parts for DSPIC30F6010-20E/PF