MC68HC711E9VFN2 Freescale Semiconductor, MC68HC711E9VFN2 Datasheet - Page 25

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MC68HC711E9VFN2

Manufacturer Part Number
MC68HC711E9VFN2
Description
IC MCU 12K OTP 2MHZ 52-PLCC
Manufacturer
Freescale Semiconductor
Series
HC11r
Datasheets

Specifications of MC68HC711E9VFN2

Core Processor
HC11
Core Size
8-Bit
Speed
2MHz
Connectivity
SCI, SPI
Peripherals
POR, WDT
Number Of I /o
38
Program Memory Size
12KB (12K x 8)
Program Memory Type
OTP
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
52-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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1.4.9 STRA/AS
The strobe A (STRA) and address strobe (AS) pin performs either of two separate functions, depending
on the operating mode:
AS can be used to demultiplex the address and data signals at port C. Refer to
Modes and On-Chip
1.4.10 STRB/R/W
The strobe B (STRB) and read/write (R/W) pin act as either an output strobe or as a data bus direction
indicator, depending on the operating mode.
In single-chip operating mode, STRB acts as a programmable strobe for handshake with other parallel
devices. Refer to
In expanded multiplexed operating mode, R/W is used to indicate the direction of transfers on the external
data bus. A low on the R/W pin indicates data is being written to the external data bus. A high on this pin
indicates that a read cycle is in progress. R/W stays low during consecutive data bus write cycles, such
as a double-byte store. It is possible for data to be driven out of port C, if internal read visibility (IRV) is
enabled and an internal address is read, even though R/W is in a high-impedance state. Refer to
Chapter 2 Operating Modes and On-Chip Memory
visibility not E).
1.4.11 Port Signals
Port pins have different functions in different operating modes. Pin functions for port A, port D, and port
E are independent of operating modes. Port B and port C, however, are affected by operating mode. Port
B provides eight general-purpose output signals in single-chip operating modes. When the microcontroller
is in expanded multiplexed operating mode, port B pins are the eight high-order address lines.
Port C provides eight general-purpose input/output signals when the MCU is in the single-chip operating
mode. When the microcontroller is in the expanded multiplexed operating mode, port C pins are a
multiplexed address/data bus.
Refer to
Terminate unused inputs and input/output (I/O) pins configured as inputs high or low.
1.4.12 Port A
In all operating modes, port A can be configured for three timer input capture (IC) functions and four timer
output compare (OC) functions. An additional pin can be configured as either the fourth IC or the fifth OC.
Any port A pin that is not currently being used for a timer function can be used as either a general-purpose
input or output line. Only port A pins PA7 and PA3 have an associated data direction control bit that allows
the pin to be selectively configured as input or output. Bits DDRA7 and DDRA3 located in PACTL register
control data direction for PA7 and PA3, respectively. All other port A pins are fixed as either input or
output.
PA7 can function as general-purpose I/O or as timer output compare for OC1. PA7 is also the input to the
pulse accumulator, even while functioning as a general-purpose I/O or an OC1 output.
Freescale Semiconductor
In single-chip mode, STRA performs an input handshake (strobe input) function.
In the expanded multiplexed mode, AS provides an address strobe function.
Table 1-1
Chapter 6 Parallel Input/Output (I/O) Ports
for a functional description of the 40 port signals within different operating modes.
Memory.
M68HC11E Family Data Sheet, Rev. 5.1
for more information about IRVNE (internal read
for further information.
Chapter 2 Operating
Pin Descriptions
25

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