MC68HC11E1CFN2 Freescale Semiconductor, MC68HC11E1CFN2 Datasheet - Page 141

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MC68HC11E1CFN2

Manufacturer Part Number
MC68HC11E1CFN2
Description
IC MCU 512 EEPROM 2MHZ 52-PLCC
Manufacturer
Freescale Semiconductor
Series
HC11r
Datasheet

Specifications of MC68HC11E1CFN2

Core Processor
HC11
Core Size
8-Bit
Speed
2MHz
Connectivity
SCI, SPI
Peripherals
POR, WDT
Number Of I /o
38
Program Memory Type
ROMless
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
52-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Program Memory Size
-

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9.1 Introduction
M68HC11E Family — Rev. 5
MOTOROLA
Data Sheet — M68HC11E Family
The M68HC11 timing system is composed of five clock divider chains. The main
clock divider chain includes a 16-bit free-running counter, which is driven by a
programmable prescaler. The main timer’s programmable prescaler provides one
of the four clocking rates to drive the 16-bit counter. Two prescaler control bits
select the prescale rate.
The prescaler output divides the system clock by 1, 4, 8, or 16. Taps off of this main
clocking chain drive circuitry that generates the slower clocks used by the pulse
accumulator, the real-time interrupt (RTI), and the computer operating properly
(COP) watchdog subsystems, also described in this section. Refer to
All main timer system activities are referenced to this free-running counter. The
counter begins incrementing from $0000 as the MCU comes out of reset and
continues to the maximum count, $FFFF. At the maximum count, the counter rolls
over to $0000, sets an overflow flag, and continues to increment. As long as the
MCU is running in a normal operating mode, there is no way to reset, change, or
interrupt the counting. The capture/compare subsystem features three input
capture channels, four output compare channels, and one channel that can be
selected to perform either input capture or output compare. Each of the three input
capture functions has its own 16-bit input capture register (time capture latch) and
each of the output compare functions has its own 16-bit compare register. All timer
functions, including the timer overflow and RTI, have their own interrupt controls
and separate interrupt vectors.
The pulse accumulator contains an 8-bit counter and edge select logic. The pulse
accumulator can operate in either event counting mode or gated time accumulation
mode. During event counting mode, the pulse accumulator’s 8-bit counter
increments when a specified edge is detected on an input signal. During gated time
accumulation mode, an internal clock source increments the 8-bit counter while an
input signal has a predetermined logic level.
The real-time interrupt (RTI) is a programmable periodic interrupt circuit that
permits pacing the execution of software routines by selecting one of four interrupt
rates.
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
Timing System
Section 9. Timing System
Figure
Data Sheet
9-1.
141

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