MPC562MZP56 Freescale Semiconductor, MPC562MZP56 Datasheet - Page 809

IC MPU 32BIT 56MHZ PPC 388-PBGA

MPC562MZP56

Manufacturer Part Number
MPC562MZP56
Description
IC MPU 32BIT 56MHZ PPC 388-PBGA
Manufacturer
Freescale Semiconductor
Series
MPC5xxr
Datasheet

Specifications of MPC562MZP56

Core Processor
PowerPC
Core Size
32-Bit
Speed
56MHz
Connectivity
CAN, EBI/EMI, SCI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
64
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 2.7 V
Data Converters
A/D 32x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
388-BGA
Processor Series
MPC5xx
Core
PowerPC
Data Bus Width
32 bit
Data Ram Size
8 KB
Interface Type
SCI, SPI, UART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
56
Number Of Timers
22
Operating Supply Voltage
2.6 V to 5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (10 bit, 32 Channel)
For Use With
MPC564EVB - KIT EVAL FOR MPC561/562/563/564
Lead Free Status / RoHS Status
Request inventory verification / Request inventory verification
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
No

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18.3
In order to reduce the number of signals on the devices, many signals have multiple functions and each
signal must be configured for access to any of these functions. The PPM module is designed to increase
the availability of MPC561/MPC563 signal multiplexed functions. It can do this is two ways:
18.3.1
The PPM communication sub-modules, PPM_MUX and PPM_SHIFTER, transfer data between the
MPC561/MPC563 and external devices. The PPM reduces the number of connections between devices by
allowing certain internal modules of the MCU to transmit and receive data serially, where without PPM
those internal modules would have to transmit and receive data in parallel. Data is routed through the PPM
using internal multiplexers. Communication between the internal modules and the PPM remains a parallel
connection, but the PPM connects to external devices by a serial link. The PPM can be configured for
different data transfer rates and data formats.
Freescale Semiconductor
1
2
3
Only accessible in Supervisor Mode.
This register is accessible in Test Mode only. Reads/Writes to this register when not in Test Mode will return TEA (bus
error access).
Accessible in Supervisor Mode and User Mode (when PPMMCR[SUPV]=0).
Access
S/U
S/U
S/U
S/U
S/U
S/U
S/U
By implementing a parallel-to-serial communication protocol,
By implementing internal signal shorting.
Functional Description
3
3
3
3
3
3
3
PPM Parallel-to-Serial Communication Protocol
SCALE_TCLK_REG
SHORT_CH_REG
Register Name
RX_SHIFTER
SHORT_REG
Reserved
TX_DATA
Reserved
Reserved
GPDO
GPDI
Table 18-1. PPM Memory Map (continued)
MPC561/MPC563 Reference Manual, Rev. 1.2
0x30 5C2C –
0x30 5C1A
0x30 5C1C
0x30 5C1E
0x30 5C2A
0x30 5C20
0x30 5C22
0x30 5C24
0x30 5C26
0x30 5C28
0x30 5C7F
Address
Data is shifted in from signals PPM_RX[0:1]
Enables shorting of transmit data channels
Data to be transmitted on PPM_TX[0:1]
Enables shorting of internal signals
Establishes frequency of TCLK
General Purpose Data Out
General Purpose Data In
Peripheral Pin Multiplexing (PPM) Module
Usage
18-3

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