MPC562MZP56 Freescale Semiconductor, MPC562MZP56 Datasheet - Page 789

• Manufacturer Part Number: MPC562MZP56
• Description: IC MPU 32BIT 56MHZ PPC 388-PBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC562MZP56

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 56MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 64
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 388-BGA
• Processor Series: MPC5xx
• Core: PowerPC
• Data Bus Width: 32 bit
• Data Ram Size: 8 KB
• Interface Type: SCI, SPI, UART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 56
• Number Of Timers: 22
• Operating Supply Voltage: 2.6 V to 5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 2 (10 bit, 32 Channel)
• For Use With: MPC564EVB - KIT EVAL FOR MPC561/562/563/564
• Lead Free Status / RoHS Status: Request inventory verification / Request inventory verification
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: No

17.10.6.2 MPWMSM Period Register (MPWMPERR)
The period register contains the binary value corresponding to the period to be generated.
17.10.6.3 MPWMSM Pulse Width Register (MPWMPULR)
The pulse width register contains the binary value of the pulse width to be generated.
Freescale Semiconductor
SRESET
Bits
0:15
Field
Addr 0x30 6000, 0x30 6008, 0x30 6010, 0x30 6018, 0x30 6020, 0x30 6028, 0x30 6080, 0x30 6088, 0x30 6090,
MSB
Name
PER
0
0x30 60AA MPWMSM21 Pulse Register (MPWMPULR)
0x30 60AC MPWMSM21 Count Register (MPWMCNTR)
0x30 60AE MPWMSM21 Status/Control Register (MPWMSCR)
0x30 609E
0x30 60A0
0x30 60A2
0x30 60A4
0x30 60A6
0x30 60A8
Address
1
Period. These bits contain the binary value corresponding to the period to be generated.
Figure 17-26. MPWMSM Period Register (MPWMPERR)
2
Table 17-25. MPWMSM Address Map (continued)
MPWMSM19 Status/Control Register (MPWMSCR)
MPWMSM20 Period Register (MPWMPERR)
MPWMSM20 Pulse Register (MPWMPULR)
MPWMSM20 Count Register (MPWMCNTR)
MPWMSM20 Status/Control Register (MPWMSCR)
MPWMSM21 Period Register (MPWMPERR)
3
Table 17-26. MPWMPERR Bit Descriptions
MPC561/MPC563 Reference Manual, Rev. 1.2
4
0x30 6098, 0x30 60A0, 0x30 60A8
5
MPWMSM20
MPWMSM21
6
Undefined
7
Register
PER
Description
8
9
10
Modular Input/Output Subsystem (MIOS14)
11
12
13
14
LSB
15
17-57