MPC562MZP56 Freescale Semiconductor, MPC562MZP56 Datasheet - Page 7

IC MPU 32BIT 56MHZ PPC 388-PBGA

MPC562MZP56

Manufacturer Part Number
MPC562MZP56
Description
IC MPU 32BIT 56MHZ PPC 388-PBGA
Manufacturer
Freescale Semiconductor
Series
MPC5xxr
Datasheet

Specifications of MPC562MZP56

Core Processor
PowerPC
Core Size
32-Bit
Speed
56MHz
Connectivity
CAN, EBI/EMI, SCI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
64
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 2.7 V
Data Converters
A/D 32x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
388-BGA
Processor Series
MPC5xx
Core
PowerPC
Data Bus Width
32 bit
Data Ram Size
8 KB
Interface Type
SCI, SPI, UART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
56
Number Of Timers
22
Operating Supply Voltage
2.6 V to 5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (10 bit, 32 Channel)
For Use With
MPC564EVB - KIT EVAL FOR MPC561/562/563/564
Lead Free Status / RoHS Status
Request inventory verification / Request inventory verification
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
No

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3.15.4.6
3.15.4.7
3.15.4.8
3.15.4.9
3.15.4.10
3.15.4.11
3.15.4.12
3.15.4.13
3.15.4.14
3.15.4.15
3.15.4.16
3.15.5
3.15.6
3.15.7
4.1
4.1.1
4.1.2
4.1.3
4.1.4
4.1.5
4.2
4.2.1
4.2.1.1
4.2.1.2
4.2.2
4.2.3
4.2.4
4.2.5
4.2.6
4.3
4.3.1
4.3.2
4.4
4.4.1
4.4.1.1
4.4.1.2
4.5
Freescale Semiconductor
Paragraph
Number
Key Features ................................................................................................................... 4-2
Operation Modes ............................................................................................................. 4-4
Exception Table Relocation (ETR) ................................................................................. 4-7
Decompressor RAM (DECRAM) Functionality .......................................................... 4-12
Branch Target Buffer .................................................................................................... 4-14
Partially Executed Instructions ................................................................................. 3-60
Timer Facilities ......................................................................................................... 3-61
Optional Facilities and Instructions .......................................................................... 3-61
BIU Key Features ....................................................................................................... 4-2
IMPU Key Features .................................................................................................... 4-3
ICDU Key Features .................................................................................................... 4-3
DECRAM Key Features ............................................................................................. 4-4
Branch Target Buffer Key Features ............................................................................ 4-4
Instruction Fetch ......................................................................................................... 4-4
Burst Operation of the BBC ........................................................................................ 4-5
Access Violation Detection ........................................................................................ 4-5
Slave Operation ........................................................................................................... 4-6
Reset Behavior ............................................................................................................ 4-6
Debug Operation Mode .............................................................................................. 4-7
ETR Operation ............................................................................................................ 4-8
Enhanced External Interrupt Relocation (EEIR) ...................................................... 4-10
General-Purpose Memory Operation ........................................................................ 4-13
Alignment Exception (0x00600) .......................................................................... 3-49
Program Exception (0x0700) ................................................................................ 3-51
Floating-Point Unavailable Exception (0x0800) .................................................. 3-52
Decrementer Exception (0x0900) ......................................................................... 3-53
System Call Exception (0x0C00) ......................................................................... 3-54
Trace Exception (0x0D00) ................................................................................... 3-54
Floating-Point Assist Exception (0x0E00) ........................................................... 3-55
Implementation-Dependent Software Emulation Exception (0x1000) ................ 3-56
Implementation-Dependent Instruction Protection Exception (0x1300) .............. 3-57
Implementation-Specific Data Protection Error Exception (0x1400) .................. 3-58
Implementation-Dependent Debug Exceptions .................................................... 3-59
Decompression Off Mode ....................................................................................... 4-4
Decompression On Mode ....................................................................................... 4-5
Memory Protection Violations ............................................................................. 4-14
DECRAM Standby Operation Mode .................................................................... 4-14
Burst Buffer Controller 2 Module
MPC561/MPC563 Reference Manual, Rev. 1.2
Contents
Chapter 4
Title
Number
Page
vii

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