MPC562MZP56 Freescale Semiconductor, MPC562MZP56 Datasheet - Page 697

• Manufacturer Part Number: MPC562MZP56
• Description: IC MPU 32BIT 56MHZ PPC 388-PBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC562MZP56

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 56MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 64
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 388-BGA
• Processor Series: MPC5xx
• Core: PowerPC
• Data Bus Width: 32 bit
• Data Ram Size: 8 KB
• Interface Type: SCI, SPI, UART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 56
• Number Of Timers: 22
• Operating Supply Voltage: 2.6 V to 5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 2 (10 bit, 32 Channel)
• For Use With: MPC564EVB - KIT EVAL FOR MPC561/562/563/564
• Lead Free Status / RoHS Status: Request inventory verification / Request inventory verification
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: No

CAN 2.0B Controller Module
CAN Station 1
CAN Station 2
CAN Station n
MPC56x CAN System
CAN
ºº
Controller
(TouCAN)
CNTX0
CNRX0
Transceiver
Transceiver
Transceiver
Figure 16-2. Typical CAN Network
Each CAN station is connected physically to the CAN bus through an external transceiver. The transceiver
provides the transmit drive, waveshaping, and receive/compare functions required for communicating on
the CAN bus. It can also provide protection against damage to the TouCAN caused by a defective CAN
bus or a defective CAN station.
16.2.1
TouCAN Signal Sharing
The CNTX0 and CNRX0 signals of TouCAN_A and TouCAN_B are available at all times. The CNTX0
and CNRX0 signals of TouCAN_C are shared with MIOS14 GPIO signals (MPIO32B11, MPIO32B12)
or QSMCM SCI2 signals (TXD2/QGPO2, RXD2/QGPI2). The signal functions for these signals are
controlled by the PDMCR2[TCNC] register.
NOTE
Only one function can be enabled on a signal at a time.
16.3
TouCAN Architecture
The TouCAN module uses a flexible design that allows each of its 16 message buffers to be designated
either a transmit (Tx) buffer or a receive (Rx) buffer. In addition, to reduce the CPU overhead required for
message handling, each message buffer is assigned an interrupt flag bit to indicate that the transmission or
reception completed successfully.
MPC561/MPC563 Reference Manual, Rev. 1.2
Freescale Semiconductor
16-3