MPC562MZP56 Freescale Semiconductor, MPC562MZP56 Datasheet - Page 160

IC MPU 32BIT 56MHZ PPC 388-PBGA

MPC562MZP56

Manufacturer Part Number
MPC562MZP56
Description
IC MPU 32BIT 56MHZ PPC 388-PBGA
Manufacturer
Freescale Semiconductor
Series
MPC5xxr
Datasheet

Specifications of MPC562MZP56

Core Processor
PowerPC
Core Size
32-Bit
Speed
56MHz
Connectivity
CAN, EBI/EMI, SCI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
64
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 2.7 V
Data Converters
A/D 32x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
388-BGA
Processor Series
MPC5xx
Core
PowerPC
Data Bus Width
32 bit
Data Ram Size
8 KB
Interface Type
SCI, SPI, UART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
56
Number Of Timers
22
Operating Supply Voltage
2.6 V to 5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (10 bit, 32 Channel)
For Use With
MPC564EVB - KIT EVAL FOR MPC561/562/563/564
Lead Free Status / RoHS Status
Request inventory verification / Request inventory verification
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
No

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Central Processing Unit
Table 3-6
3.7.4
The condition register (CR) is a 32-bit register that reflects the result of certain operations and provides a
mechanism for testing and branching. The bits in the CR are grouped into eight 4-bit fields: CR0 to CR7.
The CR fields can be set in the following ways:
3-16
30–31
Bits
Reset
29
Field
Specified fields of the CR can be set by an instruction (mtcrf) to move to the CR from a GPR.
Specified fields of the CR can be moved from one CRx field to another with the mcrf instruction.
A specified field of the CR can be set by an instruction (mcrxr) to move to the CR from the XER.
Condition register logical instructions can be used to perform logical operations on specified bits
in the condition register.
CR0 can be the implicit result of an integer operation.
illustrates the floating-point result flags that correspond to FPSCR[15:19].
Condition Register (CR)
MSB
0
Name
RN
CR0
NI
1
2
3
Non-IEEE mode bit.
Floating-point rounding control.
00 Round to nearest
01 Round toward zero
10 Round toward +infinity
11 Round toward -infinity
4
CR1
5
Table 3-6. Floating-Point Result Flags in FPSCR
6
Table 3-5. FPSCR Bit Descriptions (continued)
7
MPC561/MPC563 Reference Manual, Rev. 1.2
Result Flags
8
(Bits 15:19)
Figure 3-7. Condition Register (CR)
C<>=?
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30
10001
01001
01000
11000
10010
00010
10100
00100
00101
CR2
CR3
+ Denormalized number
– Denormalized number
– Normalized number
+ Normalized number
Result Value Class
Unchanged
Quiet NaN
Description
– Infinity
+ Infinity
+ Zero
– Zero
CR4
CR5
CR6
Freescale Semiconductor
CR7
LSB
31

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