MPC562MZP56 Freescale Semiconductor, MPC562MZP56 Datasheet - Page 136

IC MPU 32BIT 56MHZ PPC 388-PBGA

MPC562MZP56

Manufacturer Part Number
MPC562MZP56
Description
IC MPU 32BIT 56MHZ PPC 388-PBGA
Manufacturer
Freescale Semiconductor
Series
MPC5xxr
Datasheet

Specifications of MPC562MZP56

Core Processor
PowerPC
Core Size
32-Bit
Speed
56MHz
Connectivity
CAN, EBI/EMI, SCI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
64
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 2.7 V
Data Converters
A/D 32x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
388-BGA
Processor Series
MPC5xx
Core
PowerPC
Data Bus Width
32 bit
Data Ram Size
8 KB
Interface Type
SCI, SPI, UART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
56
Number Of Timers
22
Operating Supply Voltage
2.6 V to 5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (10 bit, 32 Channel)
For Use With
MPC564EVB - KIT EVAL FOR MPC561/562/563/564
Lead Free Status / RoHS Status
Request inventory verification / Request inventory verification
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
No

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Signal Descriptions
2-38
Signal List
ENGCLK
QGPIO[1:3]
EXTCLK
CLKOUT
DSDO
PCS[1:3]/
JCOMP /
EXTAL
QGPIO0
QGPIO4
QGPIO5
QGPIO6
MDO0
QGPO1
TDO
XTAL
BUCLK
PCS0 /
MISO /
MOSI /
TXD1 /
SCK /
RSTI
XFC
SS /
7
11
7
11
/
7
11
3
/
7
1
/
2.6 V / 5 V
Voltage
2.6 V
2.6 V
2.6 V
2.6 V
2.6 V
2.6 V
2.6 V
2.6 V
2.6 V
2.6 V
2.6 V
5 V
5 V
5 V
5 V
5 V
5 V
5 V
5 V
5 V
5 V
5 V
5 V
5 V
Table 2-14. MPC561/MPC563 Signal Reset State (continued)
Controlled
Slew Rate
Option?
NA ; NA
NA ; NA
NA ; NA
NA ; NA
NA ; NA
NA ; NA
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
MPC561/MPC563 Reference Manual, Rev. 1.2
No
No
No
No
No
No
200 ; 50
200 ; 50
200 ; 50
200 ; 50
200 ; 50
200 ; 50
NA ; NA
NA ; NA
NA ; NA
NA ; NA
NA ; NA
NA ; NA
50 ; 25
50 ; 25
50 ; 25
90; 50;
50 ; 50
50 ; 50
50 ; 50
50 ; 50
50 ; 50
50 ; 50
50 ; 50
Drive
Load
(pF)
25
NA
NA
15
Clocks and PLL
2
5
5
5
5
5
5
QSMCM
PU2.6 until reset
negates or the
driver is enabled
PD until SPRDS
is set
PU5 until
PULL_DIS1 is
set
PU5 until
PULL_DIS1 is
set
PU5 until
PULL_DIS1 is
set
PU5 until
PULL_DIS1 is
set
PU5 until
PULL_DIS1 is
set
PU5 until
PULL_DIS1 is
set
Reset State
Hysteresi
Enabled?
NA
NA
NA
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
s
DSDO unless the Nexus
(READI) port (MDO0) or
JTAG mode (TDO) is enabled.
See
See
XTAL
EXTAL
XFC
CLKOUT
EXTCLK
ENGCLK (2.6 V)
QGPO0
QGPIO[1:3]
QGPIO4
QGPIO5
QGPIO6
QGPO1
Function After HRESET,
Section
Section
PORESET/TRST
Freescale Semiconductor
2.5.
2.5.

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