MPC562MZP56 Freescale Semiconductor, MPC562MZP56 Datasheet - Page 1285

IC MPU 32BIT 56MHZ PPC 388-PBGA

MPC562MZP56

Manufacturer Part Number
MPC562MZP56
Description
IC MPU 32BIT 56MHZ PPC 388-PBGA
Manufacturer
Freescale Semiconductor
Series
MPC5xxr
Datasheet

Specifications of MPC562MZP56

Core Processor
PowerPC
Core Size
32-Bit
Speed
56MHz
Connectivity
CAN, EBI/EMI, SCI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
64
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 2.7 V
Data Converters
A/D 32x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
388-BGA
Processor Series
MPC5xx
Core
PowerPC
Data Bus Width
32 bit
Data Ram Size
8 KB
Interface Type
SCI, SPI, UART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
56
Number Of Timers
22
Operating Supply Voltage
2.6 V to 5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (10 bit, 32 Channel)
For Use With
MPC564EVB - KIT EVAL FOR MPC561/562/563/564
Lead Free Status / RoHS Status
Request inventory verification / Request inventory verification
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
No

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F.20.3
Note: All delays are in system clock periods.
Freescale Semiconductor
MMCSMSCR_CLS[1:0]
1
2
3
MDASM input pin period
MDASM pin low time
MDASM pin high time
Input capture resolution
Input pin to Counter Bus capture delay
Input pin to interrupt flag delay
Input pin to PIN delay
Counter bus resolution
Output pulse width
Compare resolution
Counter Bus to pin change
Counter Bus to interrupt flag set.
If the counter bus capture occurs when the counter bus is changing then the capture is delayed one cycle. In
situations where the counter bus is stable when the input capture occurs the t
cycles (the one-cycle uncertainty is due to the synchronizer).
Maximum resolution is obtained by setting CPSMPSL[3:0] =0x2 and MDASMSCR_CP[7:0] =0xFF.
Maximum output resolution and pulse width depends on counter (e.g., MMCSM) and MCPSM prescaler
settings.
Figure F-56. MMCSM Prescaler Clock Select To Counter Bus Increment Timing Diagram
Counter bus[15:0]
MDASM Timing Characteristics
Characteristics
f
3
SYS
3
1
Table F-26. MDASM Timing Characteristics
MPC561/MPC563 Reference Manual, Rev. 1.2
00
2
3
Input Modes: (IPWM, IPM, IC, DIS)
Output Modes: (OC, OPWM)
4
11
1
Symbol
t
t
t
t
t
t
t
CBFLG
COMR
t
PULW
PPER
t
CAPR
PCAP
t
PFLG
t
t
PLO
CBR
CBP
PHI
PIN
t
MCME
A
Min
4
2
2
1
2
1
2
A+1
PCAP
has a maximum delay of two
3
3
Electrical Characteristics
Max
3
2
2
2
3
2
1
2
2
F-69

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