MPC562MZP56 Freescale Semiconductor, MPC562MZP56 Datasheet - Page 1240

IC MPU 32BIT 56MHZ PPC 388-PBGA

MPC562MZP56

Manufacturer Part Number
MPC562MZP56
Description
IC MPU 32BIT 56MHZ PPC 388-PBGA
Manufacturer
Freescale Semiconductor
Series
MPC5xxr
Datasheet

Specifications of MPC562MZP56

Core Processor
PowerPC
Core Size
32-Bit
Speed
56MHz
Connectivity
CAN, EBI/EMI, SCI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
64
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 2.7 V
Data Converters
A/D 32x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
388-BGA
Processor Series
MPC5xx
Core
PowerPC
Data Bus Width
32 bit
Data Ram Size
8 KB
Interface Type
SCI, SPI, UART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
56
Number Of Timers
22
Operating Supply Voltage
2.6 V to 5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (10 bit, 32 Channel)
For Use With
MPC564EVB - KIT EVAL FOR MPC561/562/563/564
Lead Free Status / RoHS Status
Request inventory verification / Request inventory verification
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
No

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Electrical Characteristics
Note: (V
F-24
DD
= 2.6 V ± 0.1 V, V
24a
25a
25b
25d
26a
25c
23
24
25
26
CLKOUT Rising Edge to OE n
egated
-GPCM- ACS = 10, TRLX = 1
-GPCM- ACS = 11, TRLX = 1
CLKOUT Rising Edge to
WE[0:3]/BE[0:3] negated
-GPCM-write access CSNT =
‘0‘
CLKOUT Falling Edge to
WE[0:3]/BE[0:3] negated
-GPCM-write access
TRLX = ‘0’ or ‘1’, CSNT = ‘1,
EBDF = 0’.
CLKOUT Falling Edge to CS
negated
-GPCM-write access
TRLX = ‘0’ or ‘1’, CSNT = ‘1’,
ACS = ‘10’ or ACS=’11’,
EBDF = 0
CLKOUT Falling Edge to
WE[0:3]/BE[0:3] negated
-GPCM-write access
TRLX = ‘0’, CSNT = ‘1,
EBDF = 1’.
CLKOUT Falling Edge to CS
negated
-GPCM-write access
TRLX = ‘0’, CSNT = ‘1’,
ACS = ‘10’ or ACS=’11’,
EBDF = 1
WE[0:3]/BE[0:3] negated to
D[0:31] High Z
-GPCM- write access, CSNT =
‘0’
WE[0:3]/BE[0:3] negated to
D[0:31] High Z
-GPCM- write access,
TRLX = ‘0’, CSNT = ‘1’,
EBDF = 0
ADDR[8:31] to CS asserted
ADDR[8:31] to CS asserted
Characteristic
DDH
= 5.0 V ± 0.25 V, T
Table F-10. Bus Operation Timing (continued)
MPC561/MPC563 Reference Manual, Rev. 1.2
A
= T
6.25
6.25
6.25
6.25
Min
L
23
28
1
3
8
to T
40 MHz
H
, 50 pF load unless noted otherwise)
Max
7.5
14
14
17
17
8
16.42
6.25
2.25
5.71
Min
5.5
5.5
5.5
20
1
56 MHz
1
12.69
Max
10.5
10.5
17
6
6
Freescale Semiconductor
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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