MPC562MZP56 Freescale Semiconductor, MPC562MZP56 Datasheet - Page 1229

IC MPU 32BIT 56MHZ PPC 388-PBGA

MPC562MZP56

Manufacturer Part Number
MPC562MZP56
Description
IC MPU 32BIT 56MHZ PPC 388-PBGA
Manufacturer
Freescale Semiconductor
Series
MPC5xxr
Datasheet

Specifications of MPC562MZP56

Core Processor
PowerPC
Core Size
32-Bit
Speed
56MHz
Connectivity
CAN, EBI/EMI, SCI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
64
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 2.7 V
Data Converters
A/D 32x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
388-BGA
Processor Series
MPC5xx
Core
PowerPC
Data Bus Width
32 bit
Data Ram Size
8 KB
Interface Type
SCI, SPI, UART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
56
Number Of Timers
22
Operating Supply Voltage
2.6 V to 5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (10 bit, 32 Channel)
For Use With
MPC564EVB - KIT EVAL FOR MPC561/562/563/564
Lead Free Status / RoHS Status
Request inventory verification / Request inventory verification
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
No

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F.8
The supply symbols used in this section are described in
There are two power-up/down options. Choosing which one is required for an application will depend
upon circuitry connected to 2.6-V compliant pins and dual 2.6-V/5-V compliant pins. Power-up/down
option A is required if 2.6-V compliant pins and dual 2.6-V/5-V compliant pins are connected to the 5-V
supply with a pull-up resistor or driven by 5-V logic during power-up/down. In applications for which this
scenario is not true the power-up/down option B may be implemented. Option B is less stringent and easier
to ensure over a variety of applications.
Refer to
The power consumption during power-up/down sequencing will stay below the operating power
consumption specifications when following these guidelines.
F.8.1
The Option A power-up sequence (excluding V
The first step in the sequence is required is due to gate-to-drain stress limits for transistors in the pads of
2.6-V compliant pins and dual 2.6-V/5-V compliant pins. Damage can occur if gate-to-drain voltage
potential is greater than 3.1 V. This is only a concern at power-up/down. The second step in the sequence
Freescale Semiconductor
.
1. V
2. V
Table 2-1
1
2
DDH
DDH
Power-Up/Down Sequencing
(High Voltage Supply Group)
(Low Voltage Supply Pins)
These power supplies are only available on the MPC563 and MPC564.
Any supply in the V
required during “Keep-alive.”
(Low Voltage Keep-Alive
Power-Up/Down Option A
The V
rate less that 25V/ms.
V
V
Supply Pins
DDL
DDL
Symbol
for a list of 2.6 V and dual 2.6V/5 V compliant pins.
V
V
V
DDKA
DDH
DDL
DDH
+ 3.1 V (V
- 0.5 V (V
ramp voltage should be kept below 50V/ms and the V
2
DDKA
group can be powered with the V
DDH
MPC561/MPC563 Reference Manual, Rev. 1.2
DDH
Table F-9. Power Supply Pin Groups
Supply to the 5-V pads for output driver (V
Supply to the analog (QADC64E) circuitry (V
High voltage supply to the flash module (V
Supply to low voltage pad drivers (QVDDL, NVDDL)
Supply to all low voltage internal logic (V
Supply to low voltage flash circuitry (V
Supply to system PLL
Supply to IRAMSTBY
Supply to oscillator and other circuitry for keep-alive functions (KAPWR).
cannot lag V
cannot lead V
DDKA
DDL
DDL
NOTE:
) is
by more than 0.5 V)
Types of Power Pins
by more than 3.1 V)
Table
DDL
if the function which it supplies is not
F-9.
DDF
DD
)
DDH
FLASH
1
)
DDA
)
)
)
1
DDL
ramp
Electrical Characteristics
F-13

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