MPC562MZP56 Freescale Semiconductor, MPC562MZP56 Datasheet - Page 1153

IC MPU 32BIT 56MHZ PPC 388-PBGA

MPC562MZP56

Manufacturer Part Number
MPC562MZP56
Description
IC MPU 32BIT 56MHZ PPC 388-PBGA
Manufacturer
Freescale Semiconductor
Series
MPC5xxr
Datasheet

Specifications of MPC562MZP56

Core Processor
PowerPC
Core Size
32-Bit
Speed
56MHz
Connectivity
CAN, EBI/EMI, SCI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
64
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 2.7 V
Data Converters
A/D 32x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
388-BGA
Processor Series
MPC5xx
Core
PowerPC
Data Bus Width
32 bit
Data Ram Size
8 KB
Interface Type
SCI, SPI, UART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
56
Number Of Timers
22
Operating Supply Voltage
2.6 V to 5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (10 bit, 32 Channel)
For Use With
MPC564EVB - KIT EVAL FOR MPC561/562/563/564
Lead Free Status / RoHS Status
Request inventory verification / Request inventory verification
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
No

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Appendix D
TPU3 ROM Functions
The following pages provide brief descriptions of the pre-programmed functions in the TPU3. For detailed
descriptions, refer to the programming note for the individual function. The Freescale TPU Literature
Pack provides a list of available programming notes.
D.1
The TPU3 contains 4 Kbytes of microcode ROM. It can have up to 8 Kbytes of memory and a maximum
of four entry tables (see
MPC561/MPC563.
The TPU3 can address up to 8 Kbytes of memory at any one time. It has 4 Kbytes of internal ROM, located
in banks 0 and 1, and 8 Kbytes of dual-ported SRAM (DPTRAM), located in banks 0, 1, 2, and 3. As only
one type of memory can be used at a time, the TPU3 must either use the internal ROM or the SRAM.
Functions from both memory types cannot be used in conjunction.
A new feature of the TPU3 microcode ROM is the two 16-function entry tables in the 4 Kbytes of internal
ROM. The ETBANK field in the TPUMCR2 register, written once after reset, determines which one of
Freescale Semiconductor
1
Overview
The DPTRAM is located at 0x30 2000.
Add - Entry
Add - Entry
Add - Entry
TPU3ROM
Add-Entry
Code
Code
Entry
Code
Code
Figure
D-1). This appendix defines the standard ROM functions for the
MPC561/MPC563 Reference Manual, Rev. 1.2
7 FF
0
1FF
3 FF
Figure D-1. TPU3 Memory Map
Add - Entry
Add - Entry
Add - Entry
DPTRAM
.
Code
Entry
Code
Code
Code
1
1FF
3 FF
7 FF
0
5 FF
D-1

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