MPC562MZP56 Freescale Semiconductor, MPC562MZP56 Datasheet - Page 1100

• Manufacturer Part Number: MPC562MZP56
• Description: IC MPU 32BIT 56MHZ PPC 388-PBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC562MZP56

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 56MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 64
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 388-BGA
• Processor Series: MPC5xx
• Core: PowerPC
• Data Bus Width: 32 bit
• Data Ram Size: 8 KB
• Interface Type: SCI, SPI, UART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 56
• Number Of Timers: 22
• Operating Supply Voltage: 2.6 V to 5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 2 (10 bit, 32 Channel)
• For Use With: MPC564EVB - KIT EVAL FOR MPC561/562/563/564
• Lead Free Status / RoHS Status: Request inventory verification / Request inventory verification
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: No

MPC562/MPC564 Compression Features
The vocabulary and class configurations are generated by profiling the static code, based on the instruction
class algorithm.
The code compression can be created by using either default or specific application vocabularies,
generated at the previous step. In case of default vocabularies, the generation step can be omitted, but
compression efficiency is reduced.
The compression tool replaces regular PowerPC ISA instructions with a compressed representation that
contains fewer bits. The tool also updates offset fields in direct branch instructions to include a compressed
format offset (four bits of IP and word offset). Thus, maximum branch offsets in decompression on mode
are reduced. The RCPU uses the word offset for direct branch target address computation. The RCPU
provides the instruction pointer portion of the branch offset field to the decompression unit as it is
represented in the branch instruction.
A.2.12
A-12
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The instruction code is stored in the memory in the compressed format
The vocabularies are stored in a dedicated ICDU RAM (DECRAM)
The class configuration is stored in a dedicated ICDU register (DCCR)
The decompression is done on-line by the dedicated decompressor unit
Decompression flow is as follows: (See
— RCPU provides to the BBC a 2-bit aligned change of flow (COF) address
Compiler/
Linker
Decompression
Program
Executable
Non-compressed
Vocabulary
Generator
Generator
Classes
Figure A-11. Code Compression Process
MPC561/MPC563 Reference Manual, Rev. 1.2
Generation Tool
Vocabulary
Figure
Classes
Vocabulary
A-12)
Compressor
Tool
Freescale Semiconductor
Program
Executable
Compressed