C8051F369-GM Silicon Laboratories Inc, C8051F369-GM Datasheet - Page 52
C8051F369-GM
Manufacturer Part Number
C8051F369-GM
Description
IC 8051 MCU 16K FLASH 28-QFN
Manufacturer
Silicon Laboratories Inc
Series
C8051F36xr
Specifications of C8051F369-GM
Program Memory Type
FLASH
Program Memory Size
16KB (16K x 8)
Package / Case
28-QFN
Core Processor
8051
Core Size
8-Bit
Speed
50MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
POR, PWM, Temp Sensor, WDT
Number Of I /o
25
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 17x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
C8051F3x
Core
8051
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
I2C/SMBus/SPI/UART
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
25
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
KSK-SL-TOOLSTICK, PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F360DK
Minimum Operating Temperature
- 40 C
On-chip Adc
21-ch x 10-bit
On-chip Dac
1-ch x 10-bit
A/d Bit Size
10 bit
A/d Channels Available
21
Height
0.83 mm
Length
5 mm
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2.7 V
Width
5 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
770-1006 - ISP 4PORT FOR SILABS C8051F MCU336-1410 - KIT DEV FOR C8051F360 FAMILY
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1651
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
C8051F369-GM
Manufacturer:
Silicon Labs
Quantity:
135
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C8051F360/1/2/3/4/5/6/7/8/9
5.3.2. Tracking Modes
According to Table 5.1, each ADC0 conversion must be preceded by a minimum tracking time for the con-
verted result to be accurate. The AD0TM bit in register ADC0CN controls the ADC0 track-and-hold mode.
In its default state, the ADC0 input is continuously tracked, except when a conversion is in progress. When
the AD0TM bit is logic ‘1’, ADC0 operates in low-power track-and-hold mode. In this mode, each conver-
sion is preceded by a tracking period of 3 SAR clocks (after the start-of-conversion signal). When the
CNVSTR signal is used to initiate conversions in low-power tracking mode, ADC0 tracks only when
CNVSTR is low; conversion begins on the rising edge of CNVSTR (see Figure 5.4). Tracking can also be
disabled (shutdown) when the device is in low power standby or sleep modes. Low-power track-and-hold
mode is also useful when AMUX settings are frequently changed, due to the settling time requirements
described in Section “5.3.3. Settling Time Requirements” on page 53.
52
(AD0CM[2:0]=000, 001,010
Timer 1, Timer 3 Overflow
Write '1' to AD0BUSY,
(AD0CM[2:0]=100)
Timer 0, Timer 2,
Figure 5.4. 10-Bit ADC Track and Conversion Example Timing
SAR Clocks
SAR Clocks
SAR Clocks
AD0TM=1
AD0TM=0
011, 101)
AD0TM=1
AD0TM=0
CNVSTR
Low Power
or Convert
Low Power
or Convert
Track or
Convert
A. ADC0 Timing for External Trigger Source
Track or Convert
B. ADC0 Timing for Internal Trigger Source
1
1
Track
2
2
Track
Rev. 1.0
3
3
4
4
1
5
5
Convert
2
6
6
3
7
7
4
8
Convert
8
Convert
Convert
5
9
9
6
10 11 12
10 11
7
8
9
13 14
10 11
Low Power Mode
Track
Low Power
Mode
Track
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